====== DiagRC, A Diagnostic Module for RC2014 ======

===== Introduction =====

DiagRC is a low cost programmable multi-function logic analyzer and diagnostic aids for bringing up a RC2014 system. The board is similar to protoRC rev3 (picture below), but without the prototype area.

[[https://www.retrobrewcomputers.org/lib/exe/fetch.php?tok=934cd2&media=https://www.retrobrewcomputers.org/lib/plugins/ckgedit/fckeditor/userfiles/image/builderpages/plasmo/protorc3/dsc_41001216.jpg|{{https://www.retrobrewcomputers.org/lib/plugins/ckgedit/fckeditor/userfiles/image/builderpages/plasmo/protorc3/dsc_41001216.jpg?direct&600x447|www.retrobrewcomputers.org_lib_plugins_ckgedit_fckeditor_userfiles_image_builderpages_plasmo_protorc3_dsc_41001216.jpg}}]]

===== Features =====

  * Altera EPM7064SLC44
  * RC2014 bus interface
  * Local oscillator
  * Serial port for CP2102 USB-serial adapter
  * Programming header for Altera CPLD
  * Two modes of operations
      * Logic analyzer
      * Hardware diagnostic
  * 2-layer PCB, 100mmX50mm

===== Theory of Operation =====

DiagRC is based on CPLD and can be reprogrammed for different modes of operations. The CPLD is socketed so for users without Altera programmer, different mode of operations can be achieved by inserting the appropriately programmed CPLD in the socket. The modes of operation are:

==== Logic Analyzer ====

In the logic analyzer mode of operation, DiagRC monitors RC2014 bus activities and display them in real time over a high speed serial port. An reasonably achievable serial port speed is 460K. To prevent overrun of serial data, the CPU clock of RC2014 needs to be slowed down significantly to about 10KHz.

==== Hardware Diagnostic ====

In the hardware diagnostic mode of operation, DiagRC becomes a small ROM with a serial port transmitter. The program in the small ROM run memory diagnostic and initialize I/O and send status information out of the serial port transmitter. RC2014 hardware setup can be as simple as just the CPU card and DiagRC, or as complex as CPU, RAM, SIO2, digital I/O, and CF. The clock board and ROM board are not used in hardware diagnostic operation.

=== Design Info for Hardware Diagnostic Board ===

{{:builderpages:plasmo:diagrc:diagrc_rev0_scm.pdf|Schematic}}

Gerber photoplots

Build of Materials

CPLD design files

  * {{:builderpages:plasmo:diagrc:logic_analyser_7064s.zip|Logic Analyzer}}  design file
  * {{:builderpages:plasmo:diagrc:hardware_diag_7064s.zip|Hardware Diagnostic}}  design file
      * {{:builderpages:plasmo:diagrc:diagrc_rom_cpld_scm.pdf|Schematic}}  of hardware diagnostic CPLD

=== Modification to ProtoRC, rev 3 to enable hardware diagnostic function ===

[[https://www.retrobrewcomputers.org/lib/exe/fetch.php?tok=53c56a&media=https://www.retrobrewcomputers.org/lib/plugins/ckgedit/fckeditor/userfiles/image/builderpages/plasmo/diagrc/dsc_56140207.jpg|{{https://www.retrobrewcomputers.org/lib/plugins/ckgedit/fckeditor/userfiles/image/builderpages/plasmo/diagrc/dsc_56140207.jpg?direct&400x341|www.retrobrewcomputers.org_lib_plugins_ckgedit_fckeditor_userfiles_image_builderpages_plasmo_diagrc_dsc_56140207.jpg}}]]

The following jumpers to required to make protoRC rev3 into a hardware diagnostic module

Test points connections:

  * T1 to RC2014 A15
  * T2 to RC2014 A14
  * T3 to RC2014 A13
  * T4 to RC2014 A12
  * T5 to RC2014 A11
  * T6 to RC2014 A10
  * T7 to RC2014 A9
  * T8 to RC2014 D0
  * T9 to RC2014 D1
  * T10 to RC2014 D2
  * T11 to RC2014 D3
  * T12 to RC2014 D4
  * T13 to RC2014 D5
  * T14 to RC2014 D6
  * T15 to RC2014 D7

6-pin Serial port

  * Ground (pin 5) to T33
  * Transmit (pin 2) to R11 (LED current limiting resistor)

Clock to external clock

  * T37 to RC2014 CLK