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boards:ecb:mini-68k:start [2015/11/11 10:55]
rcini
boards:ecb:mini-68k:start [2016/05/01 15:28]
jcoffman
Line 1: Line 1:
-====== ECB Mini-68K Processor Card ======+====== ECB Mini-68k CPU Card ======
  
-{{:boards:ecb:mini-68k:mini68k_sm.jpg?nolink&700x399}}+[[:boards:ecb:mfpic?media=boards:ecb:mfpic|{{:boards:ecb:mini-68k:mini68k_sm.jpg?nolink&699x404}}]]
  
 ===== Introduction ===== ===== Introduction =====
  
-----+Current Version: 2.0-007
  
-The Mini-68K ECB CPU board was designed by John Coffman and includes the following general capabilities:+The Mini-M68K CPU board includes the following:
  
-  * The MC68008 CPU board is part of a 2 board system which will require the MultiFunction/PIC board. The 8-bit version 52-pin PLCC CPU (8MHz) is used, not the 48-pin DIP version.  The latter addresses only 1Mb whereas the former addresses 4Mb. +  * The MC68008 CPU board is part of a 2 board system which will require the [[:boards:ecb:mf-pic:start|MultiFunction/PIC board]]. The 8-bit version 52-pin PLCC CPU is used, not the 48-pin DIP version. The latter addresses only 1Mb whereas the former addresses 4Mb. 
-  * Memory on the CPU board itself is up to 2Mb SRAM:  4 x 512Kb chips. +  * Memory on the CPU board itself is up to 2Mb SRAM: 4 x 512Kb chips. 
-  * ROM on the board may be Flash memory or EPROM. For development work128Kb Flash (AMD 29F010) would be appropriate.  Chip sizes up to 512Kb are accommodated+  * ROM on the board may be Flash memory or EPROM. For development, 128Kb Flash (AMD 29F010) would be appropriate. Chip sizes up to 512Kbytes are accomodated
-  * Expanded memory in the form of the 4MEM board is provided for.  This will allow up to 4Mb of additional paged memory.+  * Expanded memory in the form of the 4MEM board is provided for. This will allow up to 4Mb of additional paged memory.
   * Interrupts are vectored using the Interrupt Controller on the MF/PIC board.   * Interrupts are vectored using the Interrupt Controller on the MF/PIC board.
-  * The /NMI is designed to autovector.  This gives a total of 9 possible interrupt sources. +  * The /NMI is designed to autovector. This gives a total of 9 possible interrupt sources. 
-  * The UART and timers on the MF/PIC board can use 3 of these interrupts +  * The UART and timers on the MF/PIC board use 3 of these interrupts. 
-  * The ECB bus is used and is very much like the Z80 bus, except the address bus is expanded to 24 bits. +  * The ECB bus is used very much like the Z80 bus, except the address bus is expanded to 24 bits. 
-  * M68K I/O is memory mapped to the 16-bit range:  $3Fxxxx.  To emulate a full MC68000, during I/O operations, the address bus is driven in the range:  $FFxxxx. +  * M68K I/O is memory mapped to the 16-bit range: $3Fxxxx. To emulate a full MC68000, during I/O operations, the address bus is driven in the range: $FFxxxx
-  * The board is designed to support DMA access to on-board memory.  However, there are no ECB boards at this time which use this feature.+  * The memory range assignments are as follows: 
 +      * $00.0000 - $1F.FFFF SRAM (on-board) 
 +      * $20.0000 - $2F.FFFF 1M off-board (4MEM mapped memory) 
 +      * $30.0000 - $37.FFFF optional off-board range (jumper) 
 +      * $38.0000 - $3E.FFFF Flash/EPROM boot ROM 
 +      * $3F.0000 - $3F.FFFF I/O space (generates /IORQ instead of /MREQ) 
 +  * The CPU board uses an 8Mhz clock, and generates wait states as follows: 
 +      * RAM/ROM reads: 0 w.s. 
 +      * RAM writes: 0 or 1 w.s. 
 +      * I/O reads: 1 or 2 w.s. 
 +      * I/O writes: 2 or 3 w.s
 +  * The board is designed to support DMA access to on-board memory. However, there are no ECB boards at this time which use this feature.
  
-The memory range assignments are as follows:+Memory Protection:
  
-$00.0000 - $1F.FFFF SRAM (on-board\\ $20.0000 $2F.FFFF 1M off-board (4MEM mapped memory?\\ $30.0000 $37.FFFF optional off-board range (jumper\\ $38.0000 $3E.FFFF Flash/EPROM boot ROM \\ $3F.0000 $3F.FFFF I/O space (generates /IORQ instead of /MREQ)+  * Memory protect hardware was added to the version 2 board The protect feature, if enabled, allows only supervisor mode programs to write to memory below a set limit Tests with the BIOS ROM posted on 28-Apr-2016 (see link belowindicate that the feature works with the BIOS and with CP/M of 26-Apr-2016 (part of the ROM image). 
 +      * J7, J8, J9, & J10 -- all 'on' protects the lower 1K of interrupt vectors, and will cause a Bus Error (exception 2) on a write. 
 +      * J7 off; J8, J9, & J10 on -- protects the low 4K (0x1000of memory, which includes all of the BIOS variables This appears to be the most protective setting that works. 
 +      * J7, J8 off; J9, J10 on -- protects the low 64K or memory This is too stringent for CP/M-68 programs to work, since many load at 0x1100 and appear to have variables allocated in this region. 
 +  * *** If you use this memory protect feature, please report you successes and failures on the Forum. ***   JRC 01-May-2016
  
-With an 8Mhz clock, the Mini-68k generates wait states as follows:+===== Hardware Documentation =====
  
-RAM/ROM reads 0 w.s\\ RAM writes 0 or 1 w.s\\ I/O reads 1 or w.s\\ I/O writes:  or 3 w.s.+Board: {{http://www.retrobrewcomputers.org/lib/exe/fetch.php?media=boards:ecb:mini-68k:mini-m68k-v2-pc-component.png?linkonly|mini-m68k-v2-pc-component.png}} 
 + 
 +Schematic{{:boards:ecb:mini-68k:mini-m68k-v2-sch.pdf|mini-m68k-v2-sch.pdf}} 
 + 
 +Manufacturing Files{{:boards:ecb:mini-68k:ecb_mini68k-2.0-007-mfg.zip|ecb_mini68k-2.0-007-mfg.zip}} 
 + 
 +KiCad Files: {{:boards:ecb:mini-68k:ecb_minim68k-007.zip|ecb_minim68k-007.zip}} 
 + 
 +===== File List ===== 
 + 
 +{{filelist>:boards:ecb:mini-68k:*.*&style=table&tableheader=1&tableshowdate=1&tableshowsize=1}} 
 + 
 +===== BIOS ROM images: ===== 
 + 
 +See the [[:software:firmwareos:68000:68000|software:firmwareos:68000]] page.
  
boards/ecb/mini-68k/start.txt · Last modified: 2016/05/01 15:28 by jcoffman
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