This is an old revision of the document!

ECB Mini-68K Processor Card



The Mini-68K ECB CPU board was designed by John Coffman and includes the following general capabilities:

  • The MC68008 CPU board is part of a 2 board system which will require the MultiFunction/PIC board. The 8-bit version 52-pin PLCC CPU (8MHz) is used, not the 48-pin DIP version. The latter addresses only 1Mb whereas the former addresses 4Mb.
  • Memory on the CPU board itself is up to 2Mb SRAM: 4 x 512Kb chips.
  • ROM on the board may be Flash memory or EPROM. For development work, a 128Kb Flash (AMD 29F010) would be appropriate. Chip sizes up to 512Kb are accommodated.
  • Expanded memory in the form of the 4MEM board is provided for. This will allow up to 4Mb of additional paged memory.
  • Interrupts are vectored using the Interrupt Controller on the MF/PIC board.
  • The /NMI is designed to autovector. This gives a total of 9 possible interrupt sources.
  • The UART and timers on the MF/PIC board can use 3 of these interrupts
  • The ECB bus is used and is very much like the Z80 bus, except the address bus is expanded to 24 bits.
  • M68K I/O is memory mapped to the 16-bit range: $3Fxxxx. To emulate a full MC68000, during I/O operations, the address bus is driven in the range: $FFxxxx.
  • The board is designed to support DMA access to on-board memory. However, there are no ECB boards at this time which use this feature.

The memory range assignments are as follows:

$00.0000 - $1F.FFFF SRAM (on-board)
$20.0000 - $2F.FFFF 1M off-board (4MEM mapped memory?)
$30.0000 - $37.FFFF optional off-board range (jumper)
$38.0000 - $3E.FFFF Flash/EPROM boot ROM
$3F.0000 - $3F.FFFF I/O space (generates /IORQ instead of /MREQ)

With an 8Mhz clock, the Mini-68k generates wait states as follows:

RAM/ROM reads: 0 w.s.
RAM writes: 0 or 1 w.s.
I/O reads: 1 or 2 w.s.
I/O writes: 2 or 3 w.s.

boards/ecb/mini-68k/start.1447257398.txt.gz · Last modified: 2015/11/11 10:56 by rcini
Driven by DokuWiki Recent changes RSS feed Valid CSS Valid XHTML 1.0