Table of Contents
Gryphon 68030 1.0 (Original)
The goal of the Gryphon project is to create a 32 bit single board computer that would have been state of the art - in the late '80's or early '90's. Design goals were to use through hole components and to use “period correct” function specific chips as much as possible, and programmable logic limited to 16V8GALs. Deviations from this were primarily on memory density, ethernet and video to keep the board size down.
The 68030 was chosen as the CPU for various reasons:
- The 68K/CPU32 instruction set is generally acknowledged as one of the better ISAs
- A lot of folks have a fondness for the 68K - the heart of Amigas, Ataris, Macs and others, and a time when we cut our teeth learning computers
- The '030 is the last of the Motorola line that is relatively easy to work with
- Clock speed of 25MHz is probably the limit of 2 sided PCB designs before entering RF voodoo land
Other design decisions:
- Why is the video on a daughterboard? The S1D13505 chip has 0.5mm spacing. Cost for the whole board goes up to accomodate the one chip. A decision was made to use an adapter board to help control costs.
- Why the S1D13505? The Epson chip has the most thorough documentation of anything I could find and it met the design goal of at least 800×600 color video
- Why a floppy disk interface? A true anachronism. I just thought it would be neat to understand how FDDs work. No other reason.
- Why are you doing this when you could (emulate, buy eval board, hack other 68k systems, etc)? You already know the answer or you wouldn't be on this page. It's a hobby and a learning experience.
- Why is there an image of you on the back of the board? Are you an egomaniac? This started out as a personal project. It was only after I had the gerbers ready to send to production that I decided to share the project. This is my contribution to the free hardware/software community for so much that I have benefited from over the years. Rev1.1 will not have my image.
The Gryphon68030 draws the name from the legendary creature comprised of the parts of many beings, much as the project does from other concepts.
- Paul D. Fincato - NM156
- David Mehaffy - Yoda
- MC68030 @ 25MHz
- MC68882 @ 25MHz
- 32M DRAM via 8422V Controller
- 512K SRAM (to help get it initially running)
- 512K FLASH
- Parallel Port
- 2 Serial Ports
- 8242 Keyboard/Mouse Controller
- AY-3-8910 Sound
- 37C65 FDC
- IDE interface
- RTC 72421 Clock
- RTL8019AS Ethernet
- S1D13505 Video (800×600) - (In a TQFP-128 to PGA-128 SMT Adapter)
Bold items have been verified operational or basic testing performed as of latest update. Datasheets for all of the components & example code/development utilities for the Epson S1D13505 are found here.
Current Version: Rev 1.00
Address Decode Table: gryphon68030-1.00-addressdecode.pdf
GAL Files & GALASM (includes latest updates from Yoda to 3 .pld files): gryphon68030-1.00-gals.zip
Manufacturing Files: gryphon68030-1.00-gerb.zip (The 5 Rev 1.0 prototype boards were manufactured by xuriPCB)
PCB Design Files: gryphon68030-1.00-proteus.zip (Note: The Gryphon was designed using Proteus 8.0 by Labcenter Electronics. A project to convert the design into KiCAD has started in this RBC forum thread.)
Component 3D Model Files: gryphon68030-1.00-component-3dsfiles.zip
Updates & Erratas to Rev 1.0 Boards
- PCB views showing the places where traces need to be cut on the top/bottom layers. Note the bottom layer is a view from the top through the board and is a mirror image of what you see when you flip the board. The numbers near the red lines where the trace should be cut are referenced in the above pdf file.
- Rev 1.1 schematic with all erratas incorporated to date. This will be used as the basis of the new KiCAD EDA based version of the project.
Rev 1.0 BOM
gryphon68030-1.00-software.zip - notes from Yoda:
The Gryphon-software folder contains 3 test programs at the moment. They include source, objs, bin and a Makefile for each directory. I am using the GNU gcc tool chain for elf format version 4.6.2. This is not the latest version but I will be moving up to 4.9.X at some time in the near future. I use eclipse CDT as an IDE for development and will include a image of what that looks like in this folder. I find it very productive.
A brief description and the order of usage for programs:
scream - is a simple program that loops and puts a 3 to serial terminal at 9600 baud with 2 stop bits and no parity. This program should be your first diagnostic program to run as without some form of output you are not going to get very far. This program requires no memory or stack to work.
echo - test the typing of characters at serial console and they are echoed back. Next logical program. Again requiresno memory or stack to work.
sramtest - will test the sram on the board by writing patterns and reading them back. When working you should see S1234 S1234 etc on the screen. Again this program requires no stack or memory to function.
dramtest - this will do the same for dram as the sramtest above. It is still under development and may change.
Progress & Updates
28 MAY 2015
- The DP8422 DRAM controller is now functional. Preliminary byte, word and long read/writes are successful. Minor changes to byte decode, DRAM glue GAL equations and a trace swap required.
- Exhaustive DRAM testing will begin soon for entire 32M address space
- There is still an issue with 8422 CS programming that fails to initialize properly after reset on occasion. Investigation into this is ongoing.
28 APRIL 2015
- With a few minor erratas applied the AY-3-8910 and VT82C42 check out
- Minimal code was written it ID the coprocessor installed. It identified the 68882 when installed and crashed F-line (as expected) when removed
- Schematics have been updated with latest errata changes and will be posted soon.
15 APRIL 2015
- A basic monitor was written to view memory, disassemble and download SRECs. Has been burned to FLASH and is now running on hardware.
- DRAM issue has not yet been resolved, but having a basic monitor will help debugging by eliminating the burn/replace FLASH cycle
- Yoda is currently working on unifying the code and working toward a standardized 68k monitor
27 MARCH 2015
- NM156 has successfully tested the serial port. Yoda reminded me that CTS must be asserted for the DUART to spit characters.
- Work is continuing on getting DRAM functional
22 MARCH 2015
- Yoda has serial and SRAM working on his prototype. DRAM is being worked.
- NM156 has a populated and patched board with no successful testing so far
- The first set of erratas were posted (see section above)
- MiniGW for M68K - Binary GCC68k cross compiler distribution (Windows)
- EASy68K - Editor/Assembler/Simulator for the 68k. (Windows, but has been reported to run on Linux under Wine)
- GALASM - GAL assembler(Windows) is included in the GALS .zip file. The source is on GitHub if you are developing on a platform other than Windows
- EXTRAPutty - Terminal program
- BrayTerm - Diagnostic terminal program
- COM0COM - Virtual COM ports (Signed Windows 64bit driver) - great for running a real serial terminal with EASy68k
|gryphon68030-1.00-addressdecode.pdf||30.4 KiB||2016/06/12 13:06|
|gryphon68030-1.00-brd.pdf||577.8 KiB||2016/06/12 12:46|
|gryphon68030-1.00-component-3dsfiles.zip||4.7 MiB||2016/06/12 13:15|
|gryphon68030-1.00-erattabuildnotes.pdf||31.8 KiB||2016/06/12 13:31|
|gryphon68030-1.00-erattapcb.pdf||1.9 MiB||2016/06/12 13:31|
|gryphon68030-1.00-gals.zip||60.7 KiB||2016/06/12 13:27|
|gryphon68030-1.00-gerb.zip||1.1 MiB||2016/06/12 12:44|
|gryphon68030-1.00-proteus.zip||375.3 KiB||2016/06/12 13:10|
|gryphon68030-1.00-sch.pdf||147.3 KiB||2016/06/12 12:46|
|gryphon68030-1.00-software.zip||33.5 KiB||2016/06/12 13:31|
|gryphon68030-1.10-sch.pdf||149.7 KiB||2016/06/12 12:48|
|gryphon68030-3d.jpg||493.6 KiB||2016/06/12 12:54|
|gryphon68030zofz.jpg||658.8 KiB||2016/06/12 12:54|
|gryphon_68030-1.00-bom.pdf||43.4 KiB||2016/06/12 12:46|
|hypnotoad-a.zip||2.7 MiB||2016/07/31 13:31|
|other_mc68040_sbc_v2.zip||2.8 MiB||2016/07/30 11:04|