MPU302, Repurposed SPX MPU board for CP/M-68K

A detailed writeup about the reverse engineering of MPU302 is published on Hackaday

Powering the board requires a 25-pin null modem cable between the CRAFT connector and a PC. Set baud rate to 38400, 8N1, RTS/CTS hardware handshake.

Hook up 5V & ground to the points indicated by the arrows. The '+5V' arrow points to a gold-plated wire-wrap post soldered to the banded end of the capacitor. The power consumption is about 250mA.

Immediately at power on, this message (bold) will be displayed:

AMBug v2.07a–Hardware handshake with CTS/RTS, 8/30/2017
RAM at $0 and alias at $200000, boot ROM at $600000. Type “he” for help
>

The front panel LED will alternate between red-orange-green once every second. At this point the AMbug monitor is running.

To boot CP/M68k, type 'bo' at > prompt, and this message will be displayed:

Boot CP/M 68K v1.3 CP/M-68K V1.3 COPYRIGHT (C) 1982, 1984, 1985 Digital Research A>

There are 3 “disks” on the board:

• Drive A contains the CP/M68K v1.3 distribution files, Drive A resides on flash and is read only.
• Drive B contains the BASIC compiler and associated BASIC library. Drive B also reside on flash and is read only.
• Drive C resides on super-capacitor-backed RAM. It is read/write-able.

Content of Drive A:

A: CPM      REL : SD       REL : CPM      SYS : DDT68000 68K : README   TXT
A: CB68     68K : AS68INIT     : CLIB         : CLINK    SUB : CLINKE   SUB
A: CLINKF   SUB : LIBE     A   : LIBF     A   : S        O   : ASSERT   H
A: CTYPE    H   : ERRNO    H   : MORE     C   : OPTION   H   : OSATTR   H
A: OSIF     H   : OSIFERR  H   : PORTAB   H   : CB68     L68 : SETJMP   H
A: SIGNAL   H   : STDIO    H   : C        SUB : CE       SUB : FORMAT   S
A: INIT     S   : LOADR    O   : OVHDLR   O   : TERM     C   : TERMA    S
A: XFER86   C   : BDOS     S   : BIOS     C   : BIOS     O   : BIOSA    O
A: BIOSA    S   : BIOSTYPS H   : BOOTER   O   : BOOTER   S   : CBIOS    S
A: CONFIG   C   : ELDBIOS  S   : ERGBIOS  S   : LDBIOS   O   : LDBIOSA  O
A: LDBIOSA  S   : LOADBIOS H   : LOADBIOS SUB : NOBIOSHI S   : NOBIOSLO S
A: NORMBIOS H   : NORMBIOS SUB : PUTBOOT  S   : VT52     C   : VT52     O
A: CB68     DOC : SHORT    BAS : ASCIIART BAS : CPMLDR   SYS : CPMLIB
A: LCPM     SU  : LCPM10   SUB : LDRLIB       : MAKELDR  SUB : RELCPM   SUB
A: RELOC    68K : PIP      68K : INIT     68K : COPY     68K : STAT     68K
A: DDT      68K : AS68     68K : DUMP     68K : LO68     68K : ED       68K
A: CP68     68K : AR68     68K : FIND     68K : MORE     68K : NM68     68K
A: C068     68K : C168     68K : LINK68   68K : SENDC68  68K : SIZE68   68K
A: XFER86   68K : FORMAT   68K : TERM     68K : CONFIG   68K : PUTBOOT  68K
A: AS68SYMB DAT

Content of drive B:

B: CONC     SUB : CLINKONC SUB : BASIC    SUB : BLINK    SUB : SETUPC   SUB
B: ME       TXT : ME       68K : ASM      SUB : GKERMIT  68K : NEWSIZE  S
B: FCOMP    S   : FCOPY    S   : TPALEN   S   : GKREADME TXT : BIOS     H
B: ED       H   : PORTAB   H   : STDIO    H   : BIOS     S

Drive C: is a RAM disk. It's content is preserved with super capacitor for at least a week. After a week of inactivity, it may need to be initialized with

init c:

Software changes fairly often, so this is a dedicated page for software updates.

SPX-MPU is a 6-layer pc board with power/ground layers in the middle. On some pc boards it is easy to see the inner layers clearly. This is how schematics are derived:

• Remove all components.
• Take high resolution photos of the bare board, component side and solder side.
• Overlay the component layer with the solder layer in Photoshop
• Manually trace the signals, switching layer in Photoshop as the trace switches side. Use continuity meter to verify connections where needed.

There are two sheets of C size schematics and one size B schematic. Please note these are schematics of the original pc board. They do not reflect subsequent engineering changes.

CPU/memory schematic (updated 11/25/17),

I/O schematic (updated 11/25/17).

Reset logic schematic (updated 11/25/17).

DB25F (CRAFT) connector located at the front panel

96-pin DIN41612 connector

4×16 array test pads (note: this is an array of solder pads, 4 rows by 16 columns, located next to the hexadecimal rotary switch)

There are three groups of engineering changes to the original SPX-MPU board.

The board contains two AMbug monitors. The primary one resides on a pair of 29F010 flash, UB2, UB3. The backup monitor reside on the first sector (128K byte sector) of UD3, UE3. If the primary monitor is corrupted, the backup monitor can be activated by unsoldering and swapping two existing jumper wires as shown below. (A procedure on how to reprogram the primary AMbug will be written…)

Hardware handshake engineering changes are not necessary with AMbug version 2.07c

Two engineering changes are required to enable expansion board to the 96-pin DIN41612 connector:

• 5V power to the spare pin B32
• Lower resistance of the control port.

CompactFlash IDE daughterboard. The CF IDE daughter board plugs into the DIN41612 connector. The BIOS detects the presence of the daughterboard and will enable 4 8-megabyte drives (drive D: thru G:). The number and size of the drives can be easily changed with an updated BIOS. More information on the CF IDE daughterboard can be found here.