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boards:sbc:z180_mark_iv:z180_mark_iv [2019/05/04 12:21] b1ackmai1er [Construction] |
boards:sbc:z180_mark_iv:z180_mark_iv [2021/01/10 22:20] (current) b1ackmai1er [Connectors] |
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The Z180 Mark IV is a single board computer, meaning it may run stand-alone. It also has an interface to the RetroBrew bus (ECB) for access to additional peripheral boards. | The Z180 Mark IV is a single board computer, meaning it may run stand-alone. It also has an interface to the RetroBrew bus (ECB) for access to additional peripheral boards. | ||
- | {{https:// | + | {{https:// |
+ | |||
+ | Gallery | ||
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Note: For board manufacture at JLPCB rename the PCB_Edges, Inner2, Inner3 file from .gbr to .gm1, .gp1 and .gp2 respectively. | Note: For board manufacture at JLPCB rename the PCB_Edges, Inner2, Inner3 file from .gbr to .gm1, .gp1 and .gp2 respectively. | ||
- | ====== Jumper Configuration | + | |
+ | ====== Construction ====== | ||
+ | |||
+ | Install SD card socket before installing RR2 so solder pads are more accessible. | ||
+ | |||
+ | Note C40 is installed inside of the socket. Ensure socket has appropriate clearance or install C40 on rear of board. | ||
+ | |||
+ | ===== Jumper Configuration ===== | ||
RESET CONFIGURATION | RESET CONFIGURATION | ||
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* P1 1-2 N8VEM (LEGACY) | * P1 1-2 N8VEM (LEGACY) | ||
* P1 2-3 KONTRON | * P1 2-3 KONTRON | ||
- | |||
- | EXTERNAL RESET | ||
- | |||
- | * P2 | ||
IDE POWER | IDE POWER | ||
- | * P9 JUMPERED | + | * P9 CLOSED |
+ | * P9 OPEN = GND TO IDE | ||
+ | |||
+ | ON BOARD PERIPHERALS ADDRESS | ||
- | P10 | + | * P10 80H = OXXX where O = open and X is closed |
EPROM (27C080) | EPROM (27C080) | ||
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* P12 1-2 | * P12 1-2 | ||
- | FLASH (29F040) | + | FLASH (29F040/39SF040) |
* P11 2-3 | * P11 2-3 | ||
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- | ====== Construction ====== | + | ===== Connectors |
- | Install SD card socket before installing RR2 so solder pads are more accessible. | + | EXTERNAL RESET |
- | Note C40 is installed inside of the socket. Ensure socket has appropriate clearance or install C40 on rear of board. | + | * P2 |
- | ===== Jumper Configuration ===== | + | PRIMARY SERIAL PORT CONNECTION |
- | RESET CONFIGURATION | + | * P3 |
- | * | + | With a MAX233 installed at U4 the serial port provides RS-232 level signals on Tx, Rx, CTS and RTS lines. Connection to the P3 header is via a standard Serial RS232 DB9 Male COM Port IDC connector. The Z8S180 enforces CTS/RTS flow control so this must be selected in your terminal program and supported by your serial cable and interface. |
- | P1 1-2 N8VEM (LEGACY) | + | If a MAX233 is not being used and communication is TTL level, the following connections should be made on the U4: |
- | * | + | * 2-5 - Tx |
+ | * 3-4 - Rx | ||
+ | * 1-18 - RTS | ||
+ | * 19-20 - CTS | ||
- | P1 2-3 KONTRON | + | Recommended RS-232-TTL to USB converters are the CP2102 based devices that have the additional RTS/CTS pin header locations. |
- | EXTERNAL RESET | + | In the absence of a device or cable that support CTS/RTS, pin 1 and pin 20 should be bridges on U4. |
- | * | + | RS422 SERIAL PORT CONNECTION |
- | P2 | + | * P15 |
- | IDE POWER | + | The RS422 provides the advantage of higher speed, greater noise immunity and multi-drop connectivity over the primary serial connector and is ideal for connecting to remote controllers. Only Tx/Rx is supported i.e there are no flow control or modem signals. |
- | * | ||
- | P9 JUMPERED | + | ===== Firmware ===== |
- | P10 | + | The UNA BIOS was developed on the Mark IV, and was updated to version 2.1 in January 2017. The distributed images contain Will Sowerbutt' |
- | EPROM (27C080) | + | See: software[[: |
- | * | + | Wayne' |
- | P11 1-2 | + | See: software[[: |
- | * | + | === Test ROM TEST0.BIN === |
- | P12 1-2 | + | This {{: |
- | FLASH (29F040) | + | Requirements: |
- | * | + | * SD Card installed with D3 LED |
+ | * Bicolor status LED | ||
+ | * 18.432Mhz clock | ||
+ | * Serial connection at 9600 with CTS/RTS flow control. | ||
- | P11 2-3 | + | Tests: |
- | | + | |
+ | - Determine the processor version. | ||
+ | - Check the serial interface signal CTS. | ||
+ | - Terminal output verification. | ||
+ | - Keyboard echo test. | ||
+ | - DS1302 & NVRAM test. | ||
+ | - Check SDCard switch statuses. | ||
- | P12 2-3 | + | Initial operational status is visually identified by test 1-3 flashing D3 in a sequence of 5-flashes, then 3-flashes, then 1 flash. |
+ | |||
+ | See the 0README.TXT file for more detailed information. | ||
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</ | </ | ||
- | |||
- | ====== Firmware ====== | ||
- | |||
- | The UNA BIOS was developed on the Mark IV, and was updated to version 2.1 in January 2017. The distributed images contain Will Sowerbutt' | ||
- | |||
- | See: software[[: | ||
- | |||
- | Wayne' | ||
- | |||
- | See: software[[: | ||