Table of Contents
Gerber file regeneration:
NOTE : THE FOLLOWING FILES ARE SUPERSEDED. REFER https://www.retrobrewcomputers.org/doku.php?id=boards:ecb:zilog-peripherals:start| FOR THE MOST CURRENT VERSION
Untested Gerbers for ECB Zilog Peripherals board:
Original file for comparison:
ROMWBW Customization for SIO serial ports
The Zilog Peripherals board is not currently supported by ROMWBW 2.9.0 but the Zilog SIO/DART is supported for the RC2014 platform which provides two serial ports COM1 and COM2 as devices UC1: and UP1:
Documented below are my efforts to update the ROMWBW source to support the Zilog Peripherals board.
- Zilog Peripherals board is supported by configuration. Baud rate selection is supported. Parity, Data and Stop bit changes are not currently supported.
- Driver changes are available as part of the 2.9.1+ build of ROMWBW.
Proof of Life
SBC V2 Settings
- K12 Pin 1-3
- Port B0h
- X5 Pin 15-16 (Use Crystal)
- X5 Pin 9-11 (/16)
- X6 Pin 3-5 (TXCA=PHIX)
- X6 Pin 8-10 (RXTXCB=PHIX)
- X6 Pin 7- X4 Pin 12 (RXCA=PHIX)
RetroBrew HBIOS v2.9.0, 2018-07-17 SBC Z80 @ 8.000MHz 0 MEM W/S, 1 I/O W/S, INT MODE 2 512KB ROM, 512KB RAM UART0: IO=0x68 16550A MODE=38400,8,N,1 SIO0: IO=0xB6 SIO MODE=38400,8,N,1 SIO1: IO=0xB7 SIO MODE=38400,8,N,1 DSRTC: MODE=STD Sat 2000-01-01 01:05:16 MD: UNITS=2 ROMDISK=384KB RAMDISK=384KB FD: IO=0x36 UNITS=2 PPIDE: IO=0x20 NOT PRESENT Unit Device Type Capacity/Mode ---------- ---------- ---------------- -------------------- Disk 0 MD1: RAM Disk 384KB,LBA Disk 1 MD0: ROM Disk 384KB,LBA Disk 2 FD0: Floppy Disk 3.5",DS/HD,CHS Disk 3 FD1: Floppy Disk 3.5",DS/HD,CHS Serial 0 UART0: RS-232 38400,8,N,1 Serial 1 SIO0: RS-232 38400,8,N,1 Serial 2 SIO1: RS-232 38400,8,N,1 SBC Z80 Boot Loader Boot: (C)PM, (Z)System, (M)onitor, (L)ist disks, or Disk Unit # ===> BOOT CPM FROM ROM CBIOS v2.9.0 [WBW] Configuring Drives... A:=MD1:0 B:=MD0:0 C:=FD0:0 D:=FD1:0 3719 Disk Buffer Bytes Free CP/M-80 v2.2, 54.0K TPA B>
CP/M output on UC1:
- Interrupt vector table is being populated.
- Checked interrupt enable bitmap is correct.
- Backplane links connected.
- SIO/0 Pin 13 RXCA has clock
- SIO/0 Pin 14 TXCA has clock
- SIO/0 Pin 27 RXTXCB has clock
- SIO/0 Pin 15 TXDA has serial data
- SIO/0 Pin 12 TRDA has serial data