Powering the board requires a 25-pin null modem between the CRAFT connector and a PC. Set baud rate to 38400, 8N1, RTS/CTS hardware handshake.
Hook up 5V & ground to the points indicated by the arrows. The '+5V' arrow points to a gold-plated wire-wrap post soldered to the banded end of the capacitor. The power consumption is about 250mA.
Immediately at power on, this message (bold) will be displayed:
AMbug v2.06 8/13/2017
RAM at 0 and alias at 200000, boot ROM at 600000. Type "he" for help
The front panel LED will alternate between red-orange-green once every second. At this point the AMbug monitor is running.
To boot CP/M68k, type 'bo' at > prompt, and this message will be displayed:
Boot CP/M 68K v1.3
CP/M-68K V1.3 COPYRIGHT (C) 1982, 1984, 1985 Digital Research
There are 3 "disks" on the board:
- Drive A contains the CP/M68K v1.3 distribution files, Drive A resides on flash and is read only.
- Drive B contains the BASIC compiler and associated BASIC library. Drive B also reside on flash and is read only.
- Drive C resides on super-capacitor-backed RAM. It is read/write-able.
Content of Drive A: <- This is updated on 8/17/17, previous content can be found here.
A: CPM REL : SD REL : CPM SYS : DDT68000 68K : README TXT
A: CB68 68K : AS68INIT : CLIB : CLINK SUB : CLINKE SUB
A: CLINKF SUB : LIBE A : LIBF A : S O : ASSERT H
A: CTYPE H : ERRNO H : MORE C : OPTION H : OSATTR H
A: OSIF H : OSIFERR H : PORTAB H : CB68 L68 : SETJMP H
A: SIGNAL H : STDIO H : C SUB : CE SUB : FORMAT S
A: INIT S : LOADR O : OVHDLR O : TERM C : TERMA S
A: XFER86 C : BDOS S : BIOS C : BIOS O : BIOSA O
A: BIOSA S : BIOSTYPS H : BOOTER O : BOOTER S : CBIOS S
A: CONFIG C : ELDBIOS S : ERGBIOS S : LDBIOS O : LDBIOSA O
A: LDBIOSA S : LOADBIOS H : LOADBIOS SUB : NOBIOSHI S : NOBIOSLO S
A: NORMBIOS H : NORMBIOS SUB : PUTBOOT S : VT52 C : VT52 O
A: CB68 DOC : SHORT BAS : ASCIIART BAS : CPMLDR SYS : CPMLIB
A: LCPM SU : LCPM10 SUB : LDRLIB : MAKELDR SUB : RELCPM SUB
A: SRIN S : RELOC 68K : PIP 68K : INIT 68K : COPY 68K
A: STAT 68K : DDT 68K : AS68 68K : DUMP 68K : SRIN BAK
A: LO68 68K : ED 68K : CP68 68K : AR68 68K : FIND 68K
A: MORE 68K : NM68 68K : C068 68K : C168 68K : LINK68 68K
A: SENDC68 68K : SIZE68 68K : XFER86 68K : FORMAT 68K : TERM 68K
A: CONFIG 68K : PUTBOOT 68K : AS68SYMB DAT : CONC SUB
Content of Drive B: <- With updated drive A of 8/17/17, drive B can be used for other data
B: CB68 68K : CB68 L68 : CB68 DOC : SHORT BAS : ASCIIART BAS
B: SRIN1 S : SRIN S
Backup AMbug monitor
The board contains two AMbug monitors. The primary one resides on a pair of 29F010 flash, UB2, UB3. The backup monitor reside on the first sector (128K byte sector) of UD3, UE3. If the primary monitor is corrupted, the backup monitor can be activated by unsoldering and swapping two existing jumper wires as shown below. (A procedure on how to reprogram the primary AMbug will be written…)
The assembly language software is assembled with EASy68K tool, downloadable from www.easy68k.com
AMbug version 2.06
CPM BIOS for mpu302
Data and programs requires to load CPM v1.3 distribution files into drive A:
Data and program required to load BASIC executable and BASIC library into drive B:
Data and program required to load CP/M 68k & BIOS into flash
MPU302 has the following memory map:
- Boot flash, 29F010-UB2/UB3, is mapped to location 0x0-0x40000 on powering up, but AMbug monitor remaps it to 0x600000 soon after powering up. The CP/M68k binary is stored in the boot flash from 0x615000 to 0x61FFFF.
- 2nd flash set, 29F040-UD3/UE3, is mapped to location 0x400000-0x4FFFFF. The first sector, 0x400000-0x41FFFF contains the backup AMbug monitor. The remaining memory is part of CP/M's drive A.
- 3rd flash set, 29F040-UD2/UE2, is mapped to location 0x500000-0x5FFFFF. 0x500000-0x59FFFF is part of CP/M's drive A; 0x5A0000-0x5FFFFF is CP/M's drive B.
- CP/M's Drive A is 1.5 megabytes from 0x420000 to 0x59FFFF. Drive B is 384K bytes from 0x5A0000 to 0x5FFFFF. Both drive A & B are read only.
- RAM, UB5/UB6/UD5/UD6/UF5/UF6/UH5/UH6, is located on powering up at 0x200000-0x2FFFFF but AMbug remaps it to 0x0-0xFFFFF soon after powering up. The top 256K bytes of RAM, UH5/UH6, are backed up with super capacitor. The duration of backup is temperature dependent; at room temperature, it is good for about a week.
- When AMbug monitor is running immediately after powering up, RAM location 0x0-0x3FF contains exception tables for AMbug. RAM location 0x10000-0x14FFF contains system variables including the system stack.
- When CP/M68k is running, the super-capacitor-backed RAM, 0xC0000-0xFFFFF is used as drive C. CP/M itself is located in 0x15000-0x1FFFF; CP/M's TPA is from 0x20000 to 0xBFFFF.
A number of flash configuration are needed to make MPU302 operates as a CP/M68K computer:
- write CP/M binary to boot flash
- write drive A to 2nd & 3rd set of flash
- write drive B to 3rd set of flash
1. To write CP/M binary to boot flash, load S-record CPM15000.s68 and MPUBIOS.s68 into memory; then load progCPM.s68 which will automatically execute after loading, erase the appropriate sections of boot flash, and copy CPM15000+MPUBIOS into boot flash.
2 To write CP/M distribution files into drive A require two separate S-record loads. For each S-record load, 768k bytes of data are loaded into RAM and then copied to flash. At a baud rate of 38.4K, it takes about 7 minutes to load data into RAM.
- load CPMDISKA.txt first. When the load completed 7 minutes later, load progdskA.s68 which will autoexecute, erase flash, and copy data into flash
- load CPMDISKB.txt next. When the load completed 7 minutes later, load progdskB.s68 which will autoexecute, erase flash, and copy data into flash. This completes the loading of data into drive A.
3. To write BASIC executable and BASIC library into drive B, load S-record cbasicB.txt; then load progdskC.s68 which will autoexecute, erase flash, and copy data into drive B.
This complete the flash configuration for CP/M68K.