Table of Contents
CRC65 rev1 with Prototype Area
Introduction
This is the same CRC65 rev1 but with 2“x4” of prototype area consists of array of 0.1“ spacing plated through holes.
Design files
Schematic, CPLD design files are same as CRC65 rev1.
Projects
CF bootstrap in CPLD
This project explore true ROM-less bootstrap using a state machine in CPLD to initialize CF disk and execute instructions streaming out of CF disk's data FIFO.
Link to forum discussion.
CF Bootstrap using GAL20V8
This project explore true ROM-less bootstraping with state machine in two GAL20V8
Link to forum discussion
Small ROM in GAL22V10
This project is a SBC based on 32-byte ROM bootstrap code implemented in GAL22V10.
Link to forum discussion.