Improved 512K RAM ROM Board, Rev1


Rev1 version simplifies the original design and uses all through-hole components for ease of assembly. It also added a oscillator so a functioning system can be built with a Z80 CPU board and a version 1 512K RAM/ROM board.


  • Support ROMWBW
  • ROM emulation, with few jumper configurations, the ROM socket can be populated with RAM and data uploaded into the RAM via serial port at 115200 baud,
  • EPROM programmer, programming software can be loaded in RAM to program the EPROM,
  • A serial port emulating MC6850 ACIA, the same serial port used to load ROM image can be reuse as a regular serial port.
  • Spare capacities and I/O pins on CPLD for other user-defined functionalites.
  • Nominal speed is 14.7456MHz but can be overclocked to 22MHz
  • 50mm x 102mm 2-layer pc board.


Design Information


Gerber photoplot

CPLD equations ←updated CPLD with I2C interface

Bill of Materials

Engineering change to enable I2C interface and CTS handshake


ROMWBW, this board is designed to run Wayne Warthen's excellent ROMWBW. The binary of ROMWBW v1.9.1 is provided here for convinience. The homepage for ROMWBW is located in GitHub.

RRMon rev 0.2, this is separate monitor for this board loaded via serial bootstrap software. Its purpose is board diagnostic. The monitor is under development and subject to changes.

Jumper Configuration



EPROM Programmer

By enable the serial bootstrap ROM on CPLD, the 512K RAM/ROM, in conjunction with a Z80 CPU board, can serve as a EPROM programmer. The following instruction is for programming SST39SF040 EPROM.

The jumper configuration of RR512K_rev1 is

  • T24 jumper to ground
  • T22 jumper to ground
  • T25 jumper to T27
  • T26 jumper to T28

Insert a SST39SF040 in the FLASH socket (U2),

Connect a serial port to connector P2 and set baud rate to 115200 N-8-1,

Power up the board and send the serial loader, serload.bin to the serial port. serload.bin is a binary file so be sure to check the 'Binary' box,

The EPROM programmer will respond with:

RR512K_Rev1 Loader v0.2 9/26/20
Auto start at 0xB400

Next send the EPROM programmer, progSST39F040.hex. The console will respond with:


RR512K_rev1 Programmer for SST39SF040 ver 0.3 9/26/20
SST39SF040 will now be erased
Enter Y to proceed, all other keys to abort

Enter 'Y' (upper case Y) to chip erase SST39SF040 EPROM or any other character to cancel the operation. Once chip is erased, the program will prompt user to send the image file in Intel Hex format: (as an example, this is ROMWBW version 1.9.1 )

SST39SF040 erased, ready to upload the image file
(truncated) ………………………….X

Programming is completed when 'X' is output. It takes about 2 minutes to program 512K EPROM.

I2C Interface

Engineering change to add 4-pin I2C connector to interface to 128×64 OLED display

To Do

Developing additional functions in CPLD utilizing the spare I/O pins:

  • SPI
  • WB2812B interface to drive array of RGB LEDs

Rev1.1 wish list

  • Add RTS handshake
  • Add IDE interface for disk-on-module
  • Move jumpers to more convenient locations
  • Add interface to I2C, SPI, and WB2812B
  • optional reset supervisor
builderpages/plasmo/rr512k/rr512k_rev1.txt · Last modified: 2020/12/12 10:11 by plasmo
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