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builderpages:plasmo:tinyz280 [2018/02/06 08:21] plasmo |
builderpages:plasmo:tinyz280 [2018/03/23 22:45] plasmo |
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[[https:// | [[https:// | ||
- | The picture above shows what need to be populated to support the UART bootstrap configuration. The serial port is set to 57600 baud, odd parity, 8 data bit, 1 stop. | + | The picture above shows what need to be populated to support the UART bootstrap configuration. The serial port is set to 57600 baud, odd parity, 8 data bit, 1 stop. The operating guide for UART Bootstrap configuration is [[: |
- | The Altera EPM7128 design for UART bootstrap is here. This is the programming file. | + | The Altera EPM7128 design for UART bootstrap is {{: |
- | When reset button is pressed or when initially powered up, the board expects a 256-byte serial binary data stream. After 256 bytes of data is received, Z280 will start program execution at location 0. TinyLoad is the 256-byte boot program; it has two functions: | + | When reset button is pressed or when initially powered up, the board expects a 256-byte serial binary data stream. After 256 bytes of data is received, Z280 will start program execution at location 0. TinyLoad is the 256-byte boot program; it has three functions: |
+ | - It clears memory from 0x100 to 0xFFFF to zero. | ||
- It expects Intel hex file and save it to memory specified by the load address. It will check every record and print a period (.) if the checksum matches or question mark (?) if the checksum does not match. It will output ' | - It expects Intel hex file and save it to memory specified by the load address. It will check every record and print a period (.) if the checksum matches or question mark (?) if the checksum does not match. It will output ' | ||
- It recognizes the ' | - It recognizes the ' | ||
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< | < | ||
- | TinyLoad | + | TinyLoad |
- | When done type G xxxx | + | G xxxx when done |
</ | </ | ||
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Glitchmon hex load file is {{: | Glitchmon hex load file is {{: | ||
- | cpm22all is CP/M ver 2.2 source in Z80 mnemonics. The CCP and BDOS are downloaded from cpm.z80.de: http:// | + | cpm22all is CP/M ver 2.2 source in Z80 mnemonics. The CCP and BDOS are downloaded from cpm.z80.de: |
cpm22all hex load file is {{: | cpm22all hex load file is {{: | ||
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==== Step 2, CF Bootstrap ==== | ==== Step 2, CF Bootstrap ==== | ||
- | Blah, blah, blah | + | (2/11/18) CF Bootstrap is working. The pc board is modified to add a jumper that switch between UART bootstrap and CF bootstrap. The reset connection (T14 & T15) is cut and a new output signal from CPLD is now control the reset of the Z280. This is all the physical modifications required. There are significant more firmware and software changes: |
+ | |||
+ | New CPLD with CF bootstrap state machine (CFinit) and modified memory map. Here is the{{: | ||
+ | |||
+ | CF Bootstrap software is evolving. The current approach is a small (~128 byte) cold bootstrap code located in boot sector of a CF. Before Z280 reset is released, the CFinit state machine configured the CF to stream cold bootstrap code out to CF's 16-bit data port. After reset Z280 will execute the code stream which copy a small boot loader into 0x1000 and jump to it which, in turn, load data from sector 2 and 3 and execute. Here is the{{: | ||
==== Step 3, CF Bootstrap with DRAM ==== | ==== Step 3, CF Bootstrap with DRAM ==== | ||
- | more blah, blah | + | Blah, blah, blah |
+ | |||
+ | ==== Final Step, Putting it all together ==== | ||
+ | |||
+ | After the various steps of incremental development, | ||
+ | |||
+ | This is TinyZ280 at the end of the product development. | ||
+ | |||
+ | <<< | ||
+ | |||
+ | Features: | ||
+ | |||
+ | Z280 at full bus speed of 12MHz | ||
+ | |||
+ | 4 megbyte of DRAM | ||
+ | |||
+ | Bus connected CF interface | ||
+ | |||
+ | One internal UART at 57600 baud, odd parity, no handshake | ||
+ | |||
+ | bootstrap from CF disk to a simple monitor | ||
+ | |||
+ | CP/M 2.2 | ||
+ | |||
+ | CP/M 3 non-banked | ||
+ | |||
+ | It has two modes of operations: | ||
+ | |||
+ | UART Bootstrap. This is the mode to program a new CF disk. list of software needed, terminal software setting, instruction on how to write boot sector and ZZMon | ||
+ | |||
+ | CF Bootstrap. This is normal mode of operation. At powerup, the state machine in CPLD initializes the CF to provide cold bootstrap code from the boot sector and map the memory from 0x0-0x200 to the data register of CF. Once data is ready the state machine releases the reset of Z280 which then executes a three-stage bootstrapping operations: | ||
+ | |||
+ | 1. Z280 executes the cold bootstrap code resides in the boot sector which is mapped to memory location 0x0-0x200. The cold bootstrap copy a simple CF loading program into memory and then jump into the CF loading program. | ||
+ | |||
+ | 2. The CF loading program loads the monitor, ZZMon, from CF disk into memory and execute. | ||