ZRCC Boot ROM
The ZRCC boot ROM exists as a Verilog lookup table in CPLD. Below is the listing of the boot ROM code.
;3/26/20 ;ROM inside CPLD ; two sections of code: ; serial bootstrap is 16 bytes, strapped to high ROM ; CF bootstrap is 30 bytes, strapped to low ROM ; hardware jumper selects high ROM and low ROM ; CF is in native 16 bit mode ; only the low byte contains meaningful program ; read data from master boot sector ; execute the program in master boot sector to load more program ; RxData equ 0f9h ; CPLD UART receive register TxData equ 0f9h ; CPLD UART transmit register RxStat equ 0f8h ; CPLD UART transmitter status/control register TxStat equ 0f8h ; CPLD UART receiver status/control register CFdata equ 010h ;CF data register CFerr equ 011h ;CF error reg CFsectcnt equ 012h ;CF sector count reg CF07 equ 013h ;CF LA0-7 CF815 equ 014h ;CF LA8-15 CF1623 equ 015h ;CF LA16-23 CF2427 equ 016h ;CF LA24-27 CFstat equ 017h ;CF status/command reg org 0 inc a ;padding, do nothing inc a inc a inc a ld hl,0b000h ;bootstrap code starts from 0xb000 ; examine the serial data ready flag and CF busy flag to decide which device to bootstrap from. readbsy: in a,(0f8h) ;read serial port data ready flag and 1 ; jr nz,serboot ;if serial data ready, do serial bootstrap ; ld d,e ; reg A is zero here. de is 0ffh after 1st loop ;aa: ; dec de ; cp d ; jr nz,aa in a,(CFstat) ; read CF status and 80h ; mask off all except busy bit jr nz,readbsy ;reg A is already 0 ld b,a ;make reg B zero ;;; not necessary to be in LBA mode because it set to read master boot sector ;;; ld a,0e0h ;set up LBA mode ;;; out (CF2427),a ; out (CF1623),a ; track 0 out (CF815),a inc a ;master boot sector is sector 1 out (CF07),a ;read master boot sector (sector 1) ld c,CFdata ; reg C points to CF data reg out (CFsectcnt),a ; write to sector count with 1 ;;; ld a,d ; read CPM sector ;;; cp 75h ; between LA70h and LA75h ;;; jr z,goMon ; done copying, execute monitor ;;; out (CF07),a ; read master boot sector (sector 0) ld a,20h ; read sector command out (CFstat),a ; issue the read sector command chkdrq: in a,(CFstat) ; check data request bit set before write CF data and 8 ; bit 3 is DRQ, wait for it to set jr z,chkdrq inir ;z80 read 256 bytes ;;; inir ;z80 read 256 bytes jp 0b000h inc a ;padding, do nothing inc a inc a org 31h ;put this code in high ROM serboot: ;boot strap from the serial port in a,(0f9h) ;discard first character read serboot1: in a,(0f8h) ;read status and 1 ;data ready flag is in D[0] jr z,serboot1 getser: in a,(0f9h) ;read data ld (hl),a ;save program inc l jr nz,serboot1 ;read 256 bytes jp (hl) ;same as jp 0b000h end