ECB SBC v2 004z:
Update: 20Mhz seems to be stable when using AHCT chips.
Tested on a 4-slots backplane together with DiskIO/CF, DualSD and PropIO over 3 days of continuous load (Generating 1000's of mandelbrots and storing some data to disk)
The 004z version seems very stable at 4, 10 and 12Mhz using 74LS chips but; i had to add a 1K resistor between pin12 and pin14 on U26 (74ls06) to get a clean looking CPU clock pulse. Speed change works. Sound works. Recovery switch has not been tested yet, but I will test the RI switch alternative soon.
My DS1210 chip was probably fake and was causing trouble, socket is now jumpered for bypass.
DS1302N RTC chip runs fairly accurate and the supercap keeps the time/date when board is powered off.
RomWBW settings: I have included the “DSRTCCHG .SET TRUE” in “SBC_std.asm” file to enable charging of the supercap at boot.
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SBC v2 004z completed: | ![]() |
CPU clock resistor mod: | ![]() |
20Mhz version using AHCT chips: | ![]() |